Design Automation And Methodology Engineer Eda Job In Intel In India, Penang

Job DescriptionIt's an exciting time to join Intel in a leadership role as a Design Methodology and Automation Engineer for FPGA Design, with Intel's Programmable Solutions Group Responsibilities: Performs as a highly proficient technical individual contributor in the space of Design Automation and Methodology - Custom Design Enablement and/or Physical Verification(PV) Leadership responsibilities could include defining improved methodology and identify gaps for FPGA backend design activities from concept to implementation and support of EDA tools and flows, tool evaluations, etc Lead work groups with design teams to align on Custom Design Methodology and/or PV methodology, and help drive vendor tool updates Provides technical direction, guidance and support to the design team and stakeholders throughout the design life cycle on flows for quality release and tape-out.

Liaise with EDA vendor's and other internal DA teams for enablement, address bugs, enhancement request and support Work on Virtuoso construction capabilities (PDK, std cells, Pcells, Fill Flow) and/or PV runset/rule deck, submitter development and efficiency enhancements to improve turn-around-time with improvements on Quality Responsible in capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and end-to-end testing of the software tools Liaise and consult on handoff flows and methodology from Custom to Structural Design to Fullchip teams Involved in developing the skills of less experienced engineers designers through formal training, coaching, or mentoring.

QualificationsMinimum qualifications are required to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Minimum Qualifications: Master's/Bachelor's Degree in Electrical and Electronics Engineering, Computer Engineering, Microelectronics Engineering, or closely related field 10 years of experience in the industry Minimum of 5 years with Physical Design (Custom or ASIC) experience or Design Automation.

Preferred experience: Experience with industry-based (CAD) layout tools including Cadence (Virtuoso, VXL, Skill scripting) and/or Synopsys (Custom Compiler) Experience in Physical Verification (DRC, LVS, and others - on Synopsys ICV or/and Siemens Calibre SVRF/TVF/PERC coding) Familiar with backend IC design Tools, Flows and Methodologies and provide best suited coding to achieve intended functional goals Experience with the layout of standard cells for APR, custom standard cell library, PDK content and building runset regression test cases.

Experience in analog design and layout guidelines Eg matching devices, symmetrical layout, signal shielding, and other analog-specific guidelines will be an added advantage Experienced in TCL, Shell, perl, python scripting, and has interest or exposure in 3D IC design, Machine Learning and Artificial Intelligence will be an added advantage Experience in Layout floor-planning, power plan, routing plan, hierarchical layout assembly, custom cell design, optimized cell sharing, and final layout generation will be an added advantage.

Knowledge in advance technology nodes below 7nm will be an added advantageInside this Business GroupThe Programmable Solutions Group (PSG) was formed from the acquisition of Altera As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today Combining Altera's industry-lea ding FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation.

We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potentialOther LocationsIN,BangalorePosting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinanceBenefitsWe offer a total compensation package that ranks among the best in the industry It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

Find more information about all of our Amazing Benefits here: It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money We would urge people interested in working for Intel, to apply directly at https://jobsintel.

com/ and not fall prey to unscrupulous elementsWorking ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site In certain circumstances the work model may change to accommodate business needs

Intel is looking for .

Intel is looking for Any Graduate / Post Graduate profile candidates.