Company:Qualcomm India Private LimitedJob Area:Engineering Group, Engineering Group Hardware EngineeringQualcomm Overview:Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives But this is just the beginning It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products This is the Invention Age - and this is where you come inGeneral Summary:Job Title Digital Bench Characterization Staff - DDR and High-Speed IO interface (9+ years)LocationIndia - BangaloreJob OverviewThe BDC Post Silicon Engineering group has an opening for a Digital Bench characterization Lead.
This group develops Test solutions for Design verification of Highly integrated SOC's (System on Chip) designed by Qualcomm We work with Design, System, Program Management, Yield, Reliability and Manufacturing teams to Test, support and commercialize Qualcomm's products As part of the Post Silicon Engineering group, you will be responsible for New Test methodology implementation on Leading edge DDR & High Speed IO IP's (PCIe, USB, DP, UFS, CSI, DSI, PLLs) , HW/SW integration, Device Debug and Characterization, Test automation, Data analysis, Process experiment (DOE) definition, multiple-source fab matching, product documentation/presentation, driving failure analysis to completion and yield variance control The job scope also requires the Lead to drive short term and long-term test time reduction and yield improvement to meet set goals without compromising production quality Education RequirementsMTech, BTech or Equivalent in Electronics or Electrical Engineering with 9+ years of related work experienceSkills/Experience:
- Solid understanding of Electronics engineering fundamentals, DDR & High-Speed IO circuit analysis techniques and Semiconductor manufacturing process,
- Good understanding of Test and characterization methodology of DDR and High-Speed IO interfaces
- In-depth understanding of Mobile & PC DDR 2/3/4 protocol, timing diagrams, HSIO IPs PHY level understanding and Electrical parametric compliance specifications (eye diagram, differential signaling, jitter analysis, Receiver-Jitter-Tolerance, signal integrity, transmission line considerations, de-embedding).
- Hands-on experience using Bench instruments such as oscilloscopes, J-BERT, network / spectrum analyzers, signal generators and Logic analyzers is a must
- Solid software skills for writing and debugging Test code using C, C# or Python LabView knowledge is a plus
- Using CAD software such as Mentor Graphics DA or Cadence Allegro is a plus
- Ability to work effectively in a fast-paced environment with strong verbal and written communication skills.
KeywordsDDR, High Speed IO, Electrical Spec compliance, Eye Diagram, Jitter, C, C#, Python, LabVIEWApplicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email toQualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable lawTo all Staffing and Recruiting Agencies:Our Careers Site is only for individuals seeking a job at Qualcomm Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited Qualcomm does not accept unsolicited resumes or applications from agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location.
Qualcomm is not responsible for any fees related to unsolicited resumes/applicationsIf you would like more information about this role, please contact